Prime Keys are: T_START is slotted 'ts_eq' using T_START_index DB Index Keys are: T_START_index All Keywords for series aia.temperature_summary_300s: T_START (time) T_START T_START_epoch (time) T_START_epoch T_START_step (float) T_START_step DATE (time) DATE and TIME of processing:ISO 8601 NUMPTS (int) NUMPTS - number of points in interval T01_T1_FADP_MAX (float) AIA_TS01_T1_FPA_ADAPTER - MAX T01_T1_FADP_MIN (float) AIA_TS01_T1_FPA_ADAPTER - MIN T01_T1_FADP_MEAN (float) AIA_TS01_T1_FPA_ADAPTER - MEAN T01_T1_FADP_SD (float) AIA_TS01_T1_FPA_ADAPTER - SD T02_T1_SMIR_MAX (float) AIA_TS02_T1_SEC_MIRROR - MAX T02_T1_SMIR_MIN (float) AIA_TS02_T1_SEC_MIRROR - MIN T02_T1_SMIR_MEAN (float) AIA_TS02_T1_SEC_MIRROR - MEAN T02_T1_SMIR_SD (float) AIA_TS02_T1_SEC_MIRROR - SD T03_T1_TEL1_MAX (float) AIA_TS03_T1_SCI_TEL_TUBE1 - MAX T03_T1_TEL1_MIN (float) AIA_TS03_T1_SCI_TEL_TUBE1 - MIN T03_T1_TEL1_MEAN (float) AIA_TS03_T1_SCI_TEL_TUBE1 - MEAN T03_T1_TEL1_SD (float) AIA_TS03_T1_SCI_TEL_TUBE1 - SD T04_T1_TEL2_MAX (float) AIA_TS04_T1_SCI_TEL_TUBE2 - MAX T04_T1_TEL2_MIN (float) AIA_TS04_T1_SCI_TEL_TUBE2 - MIN T04_T1_TEL2_MEAN (float) AIA_TS04_T1_SCI_TEL_TUBE2 - MEAN T04_T1_TEL2_SD (float) AIA_TS04_T1_SCI_TEL_TUBE2 - SD T05_T1_TEL3_MAX (float) AIA_TS05_T1_SCI_TEL_TUBE3 - MAX T05_T1_TEL3_MIN (float) AIA_TS05_T1_SCI_TEL_TUBE3 - MIN T05_T1_TEL3_MEAN (float) AIA_TS05_T1_SCI_TEL_TUBE3 - MEAN T05_T1_TEL3_SD (float) AIA_TS05_T1_SCI_TEL_TUBE3 - SD T06_T1_TEL4_MAX (float) AIA_TS06_T1_SCI_TEL_TUBE4 - MAX T06_T1_TEL4_MIN (float) AIA_TS06_T1_SCI_TEL_TUBE4 - MIN T06_T1_TEL4_MEAN (float) AIA_TS06_T1_SCI_TEL_TUBE4 - MEAN T06_T1_TEL4_SD (float) AIA_TS06_T1_SCI_TEL_TUBE4 - SD T07_T1_FAA_MAX (float) AIA_TS07_T1_SCI_FAA - MAX T07_T1_FAA_MIN (float) AIA_TS07_T1_SCI_FAA - MIN T07_T1_FAA_MEAN (float) AIA_TS07_T1_SCI_FAA - MEAN T07_T1_FAA_SD (float) AIA_TS07_T1_SCI_FAA - SD T08_G1_1_MAX (float) AIA_TS08_GT1_1 - MAX T08_G1_1_MIN (float) AIA_TS08_GT1_1 - MIN T08_G1_1_MEAN (float) AIA_TS08_GT1_1 - MEAN T08_G1_1_SD (float) AIA_TS08_GT1_1 - SD T09_G1_2_MAX (float) AIA_TS09_GT1_2 - MAX T09_G1_2_MIN (float) AIA_TS09_GT1_2 - MIN T09_G1_2_MEAN (float) AIA_TS09_GT1_2 - MEAN T09_G1_2_SD (float) AIA_TS09_GT1_2 - SD T10_T1_FPA_MAX (float) AIA_TS10_T1_FPA - MAX T10_T1_FPA_MIN (float) AIA_TS10_T1_FPA - MIN T10_T1_FPA_MEAN (float) AIA_TS10_T1_FPA - MEAN T10_T1_FPA_SD (float) AIA_TS10_T1_FPA - SD T11_T1_CEB_MAX (float) AIA_TS11_T1_CEB_EXTERNAL - MAX T11_T1_CEB_MIN (float) AIA_TS11_T1_CEB_EXTERNAL - MIN T11_T1_CEB_MEAN (float) AIA_TS11_T1_CEB_EXTERNAL - MEAN T11_T1_CEB_SD (float) AIA_TS11_T1_CEB_EXTERNAL - SD T14_T2_FADP_MAX (float) AIA_TS14_T2_FPA_ADAPTER - MAX T14_T2_FADP_MIN (float) AIA_TS14_T2_FPA_ADAPTER - MIN T14_T2_FADP_MEAN (float) AIA_TS14_T2_FPA_ADAPTER - MEAN T14_T2_FADP_SD (float) AIA_TS14_T2_FPA_ADAPTER - SD T15_T2_SMIR_MAX (float) AIA_TS15_T2_SEC_MIRROR - MAX T15_T2_SMIR_MIN (float) AIA_TS15_T2_SEC_MIRROR - MIN T15_T2_SMIR_MEAN (float) AIA_TS15_T2_SEC_MIRROR - MEAN T15_T2_SMIR_SD (float) AIA_TS15_T2_SEC_MIRROR - SD T16_T2_TEL1_MAX (float) AIA_TS16_T2_SCI_TEL_TUBE1 - MAX T16_T2_TEL1_MIN (float) AIA_TS16_T2_SCI_TEL_TUBE1 - MIN T16_T2_TEL1_MEAN (float) AIA_TS16_T2_SCI_TEL_TUBE1 - MEAN T16_T2_TEL1_SD (float) AIA_TS16_T2_SCI_TEL_TUBE1 - SD T17_T2_TEL2_MAX (float) AIA_TS17_T2_SCI_TEL_TUBE2 - MAX T17_T2_TEL2_MIN (float) AIA_TS17_T2_SCI_TEL_TUBE2 - MIN T17_T2_TEL2_MEAN (float) AIA_TS17_T2_SCI_TEL_TUBE2 - MEAN T17_T2_TEL2_SD (float) AIA_TS17_T2_SCI_TEL_TUBE2 - SD T18_T2_TEL3_MAX (float) AIA_TS18_T2_SCI_TEL_TUBE3 - MAX T18_T2_TEL3_MIN (float) AIA_TS18_T2_SCI_TEL_TUBE3 - MIN T18_T2_TEL3_MEAN (float) AIA_TS18_T2_SCI_TEL_TUBE3 - MEAN T18_T2_TEL3_SD (float) AIA_TS18_T2_SCI_TEL_TUBE3 - SD T19_T2_TEL4_MAX (float) AIA_TS19_T2_SCI_TEL_TUBE4 - MAX T19_T2_TEL4_MIN (float) AIA_TS19_T2_SCI_TEL_TUBE4 - MIN T19_T2_TEL4_MEAN (float) AIA_TS19_T2_SCI_TEL_TUBE4 - MEAN T19_T2_TEL4_SD (float) AIA_TS19_T2_SCI_TEL_TUBE4 - SD T20_T2_FAA_MAX (float) AIA_TS20_T2_SCI_FAA - MAX T20_T2_FAA_MIN (float) AIA_TS20_T2_SCI_FAA - MIN T20_T2_FAA_MEAN (float) AIA_TS20_T2_SCI_FAA - MEAN T20_T2_FAA_SD (float) AIA_TS20_T2_SCI_FAA - SD T21_G2_1_MAX (float) AIA_TS21_GT2_1 - MAX T21_G2_1_MIN (float) AIA_TS21_GT2_1 - MIN T21_G2_1_MEAN (float) AIA_TS21_GT2_1 - MEAN T21_G2_1_SD (float) AIA_TS21_GT2_1 - SD T22_G2_2_MAX (float) AIA_TS22_GT2_2 - MAX T22_G2_2_MIN (float) AIA_TS22_GT2_2 - MIN T22_G2_2_MEAN (float) AIA_TS22_GT2_2 - MEAN T22_G2_2_SD (float) AIA_TS22_GT2_2 - SD T23_T2_FPA_MAX (float) AIA_TS23_T2_FPA - MAX T23_T2_FPA_MIN (float) AIA_TS23_T2_FPA - MIN T23_T2_FPA_MEAN (float) AIA_TS23_T2_FPA - MEAN T23_T2_FPA_SD (float) AIA_TS23_T2_FPA - SD T24_T2_CEB_MAX (float) AIA_TS24_T2_CEB_EXTERNAL - MAX T24_T2_CEB_MIN (float) AIA_TS24_T2_CEB_EXTERNAL - MIN T24_T2_CEB_MEAN (float) AIA_TS24_T2_CEB_EXTERNAL - MEAN T24_T2_CEB_SD (float) AIA_TS24_T2_CEB_EXTERNAL - SD T27_T3_FADP_MAX (float) AIA_TS27_T3_FPA_ADAPTER - MAX T27_T3_FADP_MIN (float) AIA_TS27_T3_FPA_ADAPTER - MIN T27_T3_FADP_MEAN (float) AIA_TS27_T3_FPA_ADAPTER - MEAN T27_T3_FADP_SD (float) AIA_TS27_T3_FPA_ADAPTER - SD T28_T3_SMIR_MAX (float) AIA_TS28_T3_SEC_MIRROR - MAX T28_T3_SMIR_MIN (float) AIA_TS28_T3_SEC_MIRROR - MIN T28_T3_SMIR_MEAN (float) AIA_TS28_T3_SEC_MIRROR - MEAN T28_T3_SMIR_SD (float) AIA_TS28_T3_SEC_MIRROR - SD T29_T3_TEL1_MAX (float) AIA_TS29_T3_SCI_TEL_TUBE1 - MAX T29_T3_TEL1_MIN (float) AIA_TS29_T3_SCI_TEL_TUBE1 - MIN T29_T3_TEL1_MEAN (float) AIA_TS29_T3_SCI_TEL_TUBE1 - MEAN T29_T3_TEL1_SD (float) AIA_TS29_T3_SCI_TEL_TUBE1 - SD T01_T3_TEL2_MAX (float) AIA_TS30_T3_SCI_TEL_TUBE2 - MAX T01_T3_TEL2_MIN (float) AIA_TS30_T3_SCI_TEL_TUBE2 - MIN T01_T3_TEL2_MEAN (float) AIA_TS30_T3_SCI_TEL_TUBE2 - MEAN T01_T3_TEL2_SD (float) AIA_TS30_T3_SCI_TEL_TUBE2 - SD T31_T3_TEL3_MAX (float) AIA_TS31_T3_SCI_TEL_TUBE3 - MAX T31_T3_TEL3_MIN (float) AIA_TS31_T3_SCI_TEL_TUBE3 - MIN T31_T3_TEL3_MEAN (float) AIA_TS31_T3_SCI_TEL_TUBE3 - MEAN T31_T3_TEL3_SD (float) AIA_TS31_T3_SCI_TEL_TUBE3 - SD T32_T3_TEL4_MAX (float) AIA_TS32_T3_SCI_TEL_TUBE4 - MAX T32_T3_TEL4_MIN (float) AIA_TS32_T3_SCI_TEL_TUBE4 - MIN T32_T3_TEL4_MEAN (float) AIA_TS32_T3_SCI_TEL_TUBE4 - MEAN T32_T3_TEL4_SD (float) AIA_TS32_T3_SCI_TEL_TUBE4 - SD T33_T3_FAA_MAX (float) AIA_TS33_T3_SCI_FAA - MAX T33_T3_FAA_MIN (float) AIA_TS33_T3_SCI_FAA - MIN T33_T3_FAA_MEAN (float) AIA_TS33_T3_SCI_FAA - MEAN T33_T3_FAA_SD (float) AIA_TS33_T3_SCI_FAA - SD T34_G3_1_MAX (float) AIA_TS34_GT3_1 - MAX T34_G3_1_MIN (float) AIA_TS34_GT3_1 - MIN T34_G3_1_MEAN (float) AIA_TS34_GT3_1 - MEAN T34_G3_1_SD (float) AIA_TS34_GT3_1 - SD T35_G3_2_MAX (float) AIA_TS35_GT3_2 - MAX T35_G3_2_MIN (float) AIA_TS35_GT3_2 - MIN T35_G3_2_MEAN (float) AIA_TS35_GT3_2 - MEAN T35_G3_2_SD (float) AIA_TS35_GT3_2 - SD T36_T3_FPA_MAX (float) AIA_TS36_T3_FPA - MAX T36_T3_FPA_MIN (float) AIA_TS36_T3_FPA - MIN T36_T3_FPA_MEAN (float) AIA_TS36_T3_FPA - MEAN T36_T3_FPA_SD (float) AIA_TS36_T3_FPA - SD T37_T3_CEB_MAX (float) AIA_TS37_T3_CEB_EXTERNAL - MAX T37_T3_CEB_MIN (float) AIA_TS37_T3_CEB_EXTERNAL - MIN T37_T3_CEB_MEAN (float) AIA_TS37_T3_CEB_EXTERNAL - MEAN T37_T3_CEB_SD (float) AIA_TS37_T3_CEB_EXTERNAL - SD T40_T4_FADP_MAX (float) AIA_TS40_T4_FPA_ADAPTER - MAX T40_T4_FADP_MIN (float) AIA_TS40_T4_FPA_ADAPTER - MIN T40_T4_FADP_MEAN (float) AIA_TS40_T4_FPA_ADAPTER - MEAN T40_T4_FADP_SD (float) AIA_TS40_T4_FPA_ADAPTER - SD T41_T4_SMIR_MAX (float) AIA_TS41_T4_SEC_MIRROR - MAX T41_T4_SMIR_MIN (float) AIA_TS41_T4_SEC_MIRROR - MIN T41_T4_SMIR_MEAN (float) AIA_TS41_T4_SEC_MIRROR - MEAN T41_T4_SMIR_SD (float) AIA_TS41_T4_SEC_MIRROR - SD T42_T4_TEL1_MAX (float) AIA_TS42_T4_SCI_TEL_TUBE1 - MAX T42_T4_TEL1_MIN (float) AIA_TS42_T4_SCI_TEL_TUBE1 - MIN T42_T4_TEL1_MEAN (float) AIA_TS42_T4_SCI_TEL_TUBE1 - MEAN T42_T4_TEL1_SD (float) AIA_TS42_T4_SCI_TEL_TUBE1 - SD T43_T4_TEL2_MAX (float) AIA_TS43_T4_SCI_TEL_TUBE2 - MAX T43_T4_TEL2_MIN (float) AIA_TS43_T4_SCI_TEL_TUBE2 - MIN T43_T4_TEL2_MEAN (float) AIA_TS43_T4_SCI_TEL_TUBE2 - MEAN T43_T4_TEL2_SD (float) AIA_TS43_T4_SCI_TEL_TUBE2 - SD T44_T4_TEL3_MAX (float) AIA_TS44_T4_SCI_TEL_TUBE3 - MAX T44_T4_TEL3_MIN (float) AIA_TS44_T4_SCI_TEL_TUBE3 - MIN T44_T4_TEL3_MEAN (float) AIA_TS44_T4_SCI_TEL_TUBE3 - MEAN T44_T4_TEL3_SD (float) AIA_TS44_T4_SCI_TEL_TUBE3 - SD T45_T4_TEL4_MAX (float) AIA_TS45_T4_SCI_TEL_TUBE4 - MAX T45_T4_TEL4_MIN (float) AIA_TS45_T4_SCI_TEL_TUBE4 - MIN T45_T4_TEL4_MEAN (float) AIA_TS45_T4_SCI_TEL_TUBE4 - MEAN T45_T4_TEL4_SD (float) AIA_TS45_T4_SCI_TEL_TUBE4 - SD T46_T4_FAA_MAX (float) AIA_TS46_T4_SCI_FAA - MAX T46_T4_FAA_MIN (float) AIA_TS46_T4_SCI_FAA - MIN T46_T4_FAA_MEAN (float) AIA_TS46_T4_SCI_FAA - MEAN T46_T4_FAA_SD (float) AIA_TS46_T4_SCI_FAA - SD T47_G4_1_MAX (float) AIA_TS47_GT4_1 - MAX T47_G4_1_MIN (float) AIA_TS47_GT4_1 - MIN T47_G4_1_MEAN (float) AIA_TS47_GT4_1 - MEAN T47_G4_1_SD (float) AIA_TS47_GT4_1 - SD T48_G4_2_MAX (float) AIA_TS48_GT4_2 - MAX T48_G4_2_MIN (float) AIA_TS48_GT4_2 - MIN T48_G4_2_MEAN (float) AIA_TS48_GT4_2 - MEAN T48_G4_2_SD (float) AIA_TS48_GT4_2 - SD T49_T4_FPA_MAX (float) AIA_TS49_T4_FPA - MAX T49_T4_FPA_MIN (float) AIA_TS49_T4_FPA - MIN T49_T4_FPA_MEAN (float) AIA_TS49_T4_FPA - MEAN T49_T4_FPA_SD (float) AIA_TS49_T4_FPA - SD T50_T4_CEB_MAX (float) AIA_TS50_T4_CEB_EXTERNAL - MAX T50_T4_CEB_MIN (float) AIA_TS50_T4_CEB_EXTERNAL - MIN T50_T4_CEB_MEAN (float) AIA_TS50_T4_CEB_EXTERNAL - MEAN T50_T4_CEB_SD (float) AIA_TS50_T4_CEB_EXTERNAL - SD T53_AEBBP_MAX (float) AIA_TS53_AEB_BASEPLATE - MAX T53_AEBBP_MIN (float) AIA_TS53_AEB_BASEPLATE - MIN T53_AEBBP_MEAN (float) AIA_TS53_AEB_BASEPLATE - MEAN T53_AEBBP_SD (float) AIA_TS53_AEB_BASEPLATE - SD T54_AEBPC1_MAX (float) AIA_TS54_AEB_PWR_CONVERTR1 - MAX T54_AEBPC1_MIN (float) AIA_TS54_AEB_PWR_CONVERTR1 - MIN T54_AEBPC1_MEAN (float) AIA_TS54_AEB_PWR_CONVERTR1 - MEAN T54_AEBPC1_SD (float) AIA_TS54_AEB_PWR_CONVERTR1 - SD T55_AEBPC2_MAX (float) AIA_TS55_AEB_PWR_CONVERTR2 - MAX T55_AEBPC2_MIN (float) AIA_TS55_AEB_PWR_CONVERTR2 - MIN T55_AEBPC2_MEAN (float) AIA_TS55_AEB_PWR_CONVERTR2 - MEAN T55_AEBPC2_SD (float) AIA_TS55_AEB_PWR_CONVERTR2 - SD T56_AEBCPA_MAX (float) AIA_TS56_AEB_RAD6000_CPU_A - MAX T56_AEBCPA_MIN (float) AIA_TS56_AEB_RAD6000_CPU_A - MIN T56_AEBCPA_MEAN (float) AIA_TS56_AEB_RAD6000_CPU_A - MEAN T56_AEBCPA_SD (float) AIA_TS56_AEB_RAD6000_CPU_A - SD T57_AEBCPB_MAX (float) AIA_TS57_AEB_RAD6000_CPU_B - MAX T57_AEBCPB_MIN (float) AIA_TS57_AEB_RAD6000_CPU_B - MIN T57_AEBCPB_MEAN (float) AIA_TS57_AEB_RAD6000_CPU_B - MEAN T57_AEBCPB_SD (float) AIA_TS57_AEB_RAD6000_CPU_B - SD T58_OSCB_MAX (float) AIA_TS58_OBC_OSC_B - MAX T58_OSCB_MIN (float) AIA_TS58_OBC_OSC_B - MIN T58_OSCB_MEAN (float) AIA_TS58_OBC_OSC_B - MEAN T58_OSCB_SD (float) AIA_TS58_OBC_OSC_B - SD T59_OSCA_MAX (float) AIA_TS59_OBC_OSC_A - MAX T59_OSCA_MIN (float) AIA_TS59_OBC_OSC_A - MIN T59_OSCA_MEAN (float) AIA_TS59_OBC_OSC_A - MEAN T59_OSCA_SD (float) AIA_TS59_OBC_OSC_A - SD TC01_T1_CCD1_MAX (float) AIA_TCB01_T1_CCD_HEADER1 - MAX TC01_T1_CCD1_MIN (float) AIA_TCB01_T1_CCD_HEADER1 - MIN TC01_T1_CCD1_MEAN (float) AIA_TCB01_T1_CCD_HEADER1 - MEAN TC01_T1_CCD1_SD (float) AIA_TCB01_T1_CCD_HEADER1 - SD TC02_T1_CCD2_MAX (float) AIA_TCB02_T1_CCD_HEADER2 - MAX TC02_T1_CCD2_MIN (float) AIA_TCB02_T1_CCD_HEADER2 - MIN TC02_T1_CCD2_MEAN (float) AIA_TCB02_T1_CCD_HEADER2 - MEAN TC02_T1_CCD2_SD (float) AIA_TCB02_T1_CCD_HEADER2 - SD TC03_T2_CCD1_MAX (float) AIA_TCB03_T2_CCD_HEADER1 - MAX TC03_T2_CCD1_MIN (float) AIA_TCB03_T2_CCD_HEADER1 - MIN TC03_T2_CCD1_MEAN (float) AIA_TCB03_T2_CCD_HEADER1 - MEAN TC03_T2_CCD1_SD (float) AIA_TCB03_T2_CCD_HEADER1 - SD TC04_T2_CCD2_MAX (float) AIA_TCB04_T2_CCD_HEADER2 - MAX TC04_T2_CCD2_MIN (float) AIA_TCB04_T2_CCD_HEADER2 - MIN TC04_T2_CCD2_MEAN (float) AIA_TCB04_T2_CCD_HEADER2 - MEAN TC04_T2_CCD2_SD (float) AIA_TCB04_T2_CCD_HEADER2 - SD TC05_T3_CCD1_MAX (float) AIA_TCB05_T3_CCD_HEADER1 - MAX TC05_T3_CCD1_MIN (float) AIA_TCB05_T3_CCD_HEADER1 - MIN TC05_T3_CCD1_MEAN (float) AIA_TCB05_T3_CCD_HEADER1 - MEAN TC05_T3_CCD1_SD (float) AIA_TCB05_T3_CCD_HEADER1 - SD TC06_T3_CCD2_MAX (float) AIA_TCB06_T3_CCD_HEADER2 - MAX TC06_T3_CCD2_MIN (float) AIA_TCB06_T3_CCD_HEADER2 - MIN TC06_T3_CCD2_MEAN (float) AIA_TCB06_T3_CCD_HEADER2 - MEAN TC06_T3_CCD2_SD (float) AIA_TCB06_T3_CCD_HEADER2 - SD TC07_T4_CCD1_MAX (float) AIA_TCB07_T4_CCD_HEADER1 - MAX TC07_T4_CCD1_MIN (float) AIA_TCB07_T4_CCD_HEADER1 - MIN TC07_T4_CCD1_MEAN (float) AIA_TCB07_T4_CCD_HEADER1 - MEAN TC07_T4_CCD1_SD (float) AIA_TCB07_T4_CCD_HEADER1 - SD TC08_T4_CCD2_MAX (float) AIA_TCB08_T4_CCD_HEADER2 - MAX TC08_T4_CCD2_MIN (float) AIA_TCB08_T4_CCD_HEADER2 - MIN TC08_T4_CCD2_MEAN (float) AIA_TCB08_T4_CCD_HEADER2 - MEAN TC08_T4_CCD2_SD (float) AIA_TCB08_T4_CCD_HEADER2 - SD TC09_T1_CEB_MAX (float) AIA_TCB09_T1_CEB_PWB - MAX TC09_T1_CEB_MIN (float) AIA_TCB09_T1_CEB_PWB - MIN TC09_T1_CEB_MEAN (float) AIA_TCB09_T1_CEB_PWB - MEAN TC09_T1_CEB_SD (float) AIA_TCB09_T1_CEB_PWB - SD TC10_T2_CEB_MAX (float) AIA_TCB10_T2_CEB_PWB - MAX TC10_T2_CEB_MIN (float) AIA_TCB10_T2_CEB_PWB - MIN TC10_T2_CEB_MEAN (float) AIA_TCB10_T2_CEB_PWB - MEAN TC10_T2_CEB_SD (float) AIA_TCB10_T2_CEB_PWB - SD TC11_T3_CEB_MAX (float) AIA_TCB11_T3_CEB_PWB - MAX TC11_T3_CEB_MIN (float) AIA_TCB11_T3_CEB_PWB - MIN TC11_T3_CEB_MEAN (float) AIA_TCB11_T3_CEB_PWB - MEAN TC11_T3_CEB_SD (float) AIA_TCB11_T3_CEB_PWB - SD TC12_T4_CEB_MAX (float) AIA_TCB12_T4_PWB_TEMP - MAX TC12_T4_CEB_MIN (float) AIA_TCB12_T4_PWB_TEMP - MIN TC12_T4_CEB_MEAN (float) AIA_TCB12_T4_PWB_TEMP - MEAN TC12_T4_CEB_SD (float) AIA_TCB12_T4_PWB_TEMP - SD